Binary arithmetic is the basis of the numerical processing power of digital computer systems. Addition is the foundation of this arithmetic, as to subtract, one of the two numbers is inverted and added; to multiply the number to be multplied is added over and over again and to divide, repeated subtraction is used. The problem of digital binary arithmetic is therefore reduced to designing and building an adder circuit. The first task is to determine what the adder must do.

Adding two single digits:- 0+ 1+ 0+ 1+ 0 0 1 1 - - - - 0 1 1 10 ^ CARRY HERE This can be summarised in a TRUTH TABLE B A SUM CARRY 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 Adding three single digits:- C B A SUM CARRY 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1The TRUTH Tables above provide the basis for the design of the logic circuits required to contruct an Adder circuit.

B A SUM CARRY 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1

HALF ADDER circuit

The process of "inspection", whereby we look at a truth table for the patterns that indicate what functions are involved, is much more complex when the FULL ADDER circuit is being designed. The functions can be seen even here but we are reaching the limits of this technique. The process called KARNAUGH MAPPING, see next week! is one which can help in this sort of design. The TRUTH table for the FULL ADDER is shown below again for reference.

C B A SUM CARRY 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1The

C B A SUM A XOR B (A XOR B) XOR C 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 1 1 1 0 1 1 0 0 0 1 0 0 1 0 1 1 0 1 0 1 0 1 1 0 0 1 0 1 1 1 1 0 1The above TRUTH TABLE has SUM column and (A XOR B) XOR C column the same proving that

C B A CARRY A.B A.C B.C (A.B)+(A.C)+(B.C) 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 0 1 0 0 1 1 1 1 1 1 1 1 1 1The above TRUTH TABLE has a CARRY column and (A.B)+(A.C)+(B.C) column the same proving that

FULL ADDER circuit

The HALF ADDER circuits were proved in the appropriate section above, but the FULL ADDER circuits have yet to be proved. The SUM circuit can be seen to be two XOR gates, the first is

C B A CARRY A XOR B Y=(A XOR B).C A.B (A.B)+Y 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 1 1 0 0 1 1 1 0 0 0 0 0 0 0 1 0 1 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 1 1 0 0 1 1The fact that the column for CARRY and the column for (A.B)+Y, which is (A.B)+(A XOR B).C, are identical means that the CARRY produced by the circuit is also correct.

Numbers larger than 1 are represented in binary by more than one bit, so any practical adder has to be able to handle multi-bit numbers. The example below is a circuit made up of four full adders connected to add two numbers Bits A0 - A3 and Bits B0 - B3. The results are output as SUM0 - SUM3, with a final CARRY. Each stage, except the first, needs three inputs for A, B and CARRY IN from the previous stage. The first stage needs only two inputs so a half adder could be used there, but for convenience of manufacture all full adders are used. IC's with all four stages on one chip are available implementing the circuit shown below. Note because all stages are full adders, the first stage CARRY IN needs connecting to logic '0'.

FOUR BIT ADDER circuit