TRIAL ONE TESTING PAGE


TRIAL ONE TESTING: An introduction to the techniques used to test digital circuits.


An important feature of testing is to check parts of a complex system in isolation. Often complex systems are designed in this way providing ready made sections to test. In other cases, emulating sections of cicuits not yet completed, to test other parts of a system is used.
SECTION INDEX
  1. Revision of Combinational Logic and Introduction to the Digital Logic Trainer.
  2. Introduction to the Practical Task and the creation of segment select circuits.
  3. Details of the 7 Segment Display and the use of segment selection circuits to drive it.
  4. The use of a CMOS 4511 BCD to 7 Segment Latch Decoder Driver as part of Practical Task.

1. Revision of Combinational Logic and Introduction the Digital Logic Trainer.

The testing involved in this first section is very simple. The inputs to the 2 input AND gate, selected from the four on the CMOS 4081, are connected to the logic level switches. Pin 1 and pin 2 were used as inputs for this test with pin 3 as the output. A multimeter, switched to DC Volts and 20 Volt range, is used to check the output. The COMMON of the meter is connected to 0V on the digital trainer and the (V, ohm and mA) connection of the multimeter is used to check the output on pin 3 of the chip. The results should be the same as the truth table below. In these tests, 0 in the table will be 0 volts and 1 will be very close to the actual supply voltage of the digital trainer.

>
B A OUTPUT
0 0 0
0 1 0
1 0 0
1 1 1

RETURN TO SECTION 1


2. Introduction to the Practical Task and the creation of segment select circuits.


3. Details of the 7 Segment Display and the use of segment selection circuits to drive it.

NOTE: the testing of the seven segment driver circuit and display must be done WITHOUT THE SEGMENT SELECTION CIRCUITS CONNECTED TO THE SEVEN SEGMENT DRIVER CIRCUIT.
The testing of the seven segment display and the driver circuit provide an excellent example of the method of testing "in sections" and was the one I used to check the operation of the driver curcuit before dispatch. The monitor points on the terminal strip are connected to the seven segment input lines, so they can be used as inputs, provided no connection is made to input line pins on the 16 pin connector to the driver circuit. The driver circuit and seven segment display were connected as shown on the trial1_building.htm page. The picture of the connections is shown again here as a reminder.



The +V output terminal on the monitor strip, shown below, is used as the signal to each of segment "a" to "g" inputs on the strip using a single length of connecting wire as a test lead.


One end of the test lead is connected to the +V output terminal and the other just touched on the segment terminals in turn. The individual segment powered should light up while the segment terminal is in contact with the wire. The display layout is repeated below to make the check easier.



[Do not accidentally touch the wire onto the 0V terminal at the far end of the strip as this would SHORT CIRCUIT the battery power supply.]

The final step of the Test is to connect the segment selection circuits to the monitor display terminals using the segment terminals "a" to "g". The display for each of the four switch settings, OFF OFF, OFF ON, ON OFF and ON ON, are checked to confirm results of "0" to "3".


4. The use of a CMOS 4511 BCD to 7 Segment Latch Decoder Driver as part of Practical Task.

The testing of the 4511 chip and the seven segment display and the driver circuit provide another example of the method of testing "in sections". The first stage is to test the operation of CMOS 4511 BCD to 7 Segment Latch Decoder Driver. The two logic level switches are connected to the A and B BCD inputs, C and D are each connected to OV on the digital trainer. A digital multimeter is again used to measure the segment voltages for each of the four switch values. The COMMON being connected to 0V on the digital trainer and a lead fro (V, ohm an mA) used to measure each segment output voltage for each switch value. A 0 logic level will measure 0 volts, but a 1 logic level will be less than the +V from the digital trainer due to the internal circuitry of the 4511 chip. The pinout of the 4511 and the segment selection information table are included below for easy reference.